My research has generated or influenced hardware and software security architectures deployed on a large proportion of computer systems in use today.
I have contributed to shipping processor security technologies, including Control-Flow Enforcement Technology (CET) and VT-Redirect Protection (VT-rp).
I was Principal Investigator for Intel’s project on Cryptographic Capability Computing (C3) in the DARPA HARDEN program.
I designed and co-developed deterministic spatial safety support for MiraclePtr in the Chrome browser.
My LLVM-based research on shielding stack memory from corruption helped lead to a 2022 paper in a top-tier programming languages conference covered by ZDNet.
I also researched approaches for scalable isolation, e.g., using segmentation to accelerate WebAssembly (upstreamed in wasm2c).
Advised by Prof. Carl A. Gunter.
National Defense Science and Engineering Graduate (NDSEG) Fellow.
M.S. Thesis: Dependable Emergency-Response Networking Based on Retaskable Network Infrastructures.
Postdoc through May 2012.
UWEC Outstanding CS Senior of the Year, 2005
Karlgaard Scholarship
Summa cum laude
National Merit Scholarship Finalist
App, kernel, and hypervisor development for Linux, Windows, and embedded systems with Boost and generics experience
SAT/SMT solver (completed Coursera course)
Somewhat familiar with assembly language for other architectures as well
Compiler framework
High-Level Synthesis (HLS) language based on Term-Rewriting Systems
Model checker based on Term-Rewriting Systems and Linear-Temporal Logic
Interactive theorem prover
Experience using Intel Quartus and Xilinx Vivado FPGA toolchains. Experience using Synopsys VCS and Mentor Graphics Modelsim simulators. Experience extending and maintaining an in-house Verilog simulator during an internship with Cray, Inc.
Logic programming language